Our History

1988 to 1998:

After working for many years as an IC designer for such companies as Xerox, Silicon Systems and Sharp Corporation's USA division, our Founder decided to become an Independent Contractor and formed Advanced Silicon Technology (AST). During the next decade, he worked as a Consultant doing primarily CMOS and Bipolar IC design. During this period, he did much of his own chip layout and did a few layout jobs for some of his friends and colleagues. When the layout side of the business started to increase, he wrote CAD tools to help speed up the layout.

1998 to 2000:

CAD tool development continued and the demand for layout work increased rapidly. In 1999, a Designer working for one of the world's largest makers of Micro Processors (They don't like their name to be used.) found the AST website and had AST do a small layout project consisting of only an Op Amp. Many more chips from this customer followed with the complexity increasing on each design. One of the chip designers from this company went on a job interview with another large chip maker. During the interview, this applicant was asked who did their layout. This second major company now contacted us to do layout for them. We never found out who the applicant was. Now the work load started to become a problem and AST increased Staff and incorporated.

2000 to Present:

During this period, AST developed a foundry independent "EZ" layout language that does automatic layout for common layout structures. We also improved our Set Up Tools for the automatic generation of the DRC, LVS, Soft-tie, and antenna checking programs. This allows us to quickly set up for most foundries and automatically generate common low level layout structures. To date our perfect record for first time working silicon has probably never been exceeded. We have done over 150 full chips and many block layouts. We currently do about 30 final checks to give the best chance for first time working silicon.